Sciweavers

658 search results - page 35 / 132
» Challenges in Physical Chip Design
Sort
View
FPT
2005
IEEE
163views Hardware» more  FPT 2005»
14 years 2 months ago
Designing an FPGA SoC Using a Standardized IP Block Interface
Designing Systems on-Chip is becoming increasingly popular as die sizes increase and technology sizes decrease. The complexity of integrating different types of Processing Element...
Lesley Shannon, Blair Fort, Samir Parikh, Arun Pat...
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
14 years 1 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
HOST
2009
IEEE
14 years 3 months ago
Analysis and Design of Active IC Metering Schemes
—Outsourcing the fabrication of semiconductor devices to merchant foundries raises some issues concerning the IP protection of the design. Active hardware metering schemes try to...
Roel Maes, Dries Schellekens, Pim Tuyls, Ingrid Ve...
MM
2009
ACM
199views Multimedia» more  MM 2009»
14 years 3 months ago
Beyond flat surface computing: challenges of depth-aware and curved interfaces
In the past decade, multi-touch-sensitive interactive surfaces have transitioned from pure research prototypes in the lab, to commercial products with wide-spread adoption. One of...
Hrvoje Benko
AAAI
1998
13 years 10 months ago
Qualitative Analysis of Distributed Physical Systems with Applications to Control Synthesis
Manyimportant physical phenomena,such as temperature distribution, air flow, and acoustic waves,are describedas continuous,distributed parameterfields. Analyzingandcontrolling the...
Christopher Bailey-Kellogg, Feng Zhao