Sciweavers

658 search results - page 81 / 132
» Challenges in Physical Chip Design
Sort
View
DSD
2009
IEEE
152views Hardware» more  DSD 2009»
14 years 21 days ago
ARROW - A Generic Hardware Fault Injection Tool for NoCs
Todays NoCs are reaching a level where it is getting very hard to ensure 100% of functionality. Consequently, fault tolerance has become an important aspect in todays design techn...
Michael Birner, Thomas Handl
HCI
2007
13 years 10 months ago
RFID Cards: A New Deal for Elderly Accessibility
Elderly adults face two serious challenges bridging the digital divide. First, many suffer from physical or cognitive disabilities, which inhibit computer use. Second, the “tradi...
Robert Pastel, Charles Wallace, Jesse Heines
SOCIALCOM
2010
13 years 6 months ago
Assessing the Value of Contributions in Tagging Systems
-- Assessing the value of individual users' contributions in peer-production systems is paramount to the design of mechanisms that support collaboration and improve users'...
Elizeu Santos-Neto, Flavio Figueiredo, Jussara M. ...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
14 years 2 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
ISPD
2005
ACM
151views Hardware» more  ISPD 2005»
14 years 2 months ago
Thermal via placement in 3D ICs
As thermal problems become more evident, new physical design paradigms and tools are needed to alleviate them. Incorporating thermal vias into integrated circuits (ICs) is a promi...
Brent Goplen, Sachin S. Sapatnekar