658 search results - page 86 / 132 » Challenges in Physical Chip Design |
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, ...
CHI
2002
ACM
14 years 9 months ago
2002
ACM
Previous systems have explored the challenges of designing an interface for automotive styling which combine the metaphor of 2D drawing using physical tape with the simultaneous c...
CHI
2003
ACM
14 years 9 months ago
2003
ACM
Although PDAs typically run applications in a "standalone" mode, they are increasingly equipped with wireless communications, which makes them useful in new domains. Thi...
IPSN
2010
Springer
14 years 3 months ago
2010
Springer
Wireless Sensor Actuator Networks (WSANs) extend wireless sensor networks through actuation capability. Designing robust logic for WSANs however is challenging since nodes can aï¬...
SASO
2009
IEEE
14 years 3 months ago
2009
IEEE
—The complexity of distributed computing systems and their increasing interaction with the physical world impose challenging requirements in terms of adaptation, robustness, and ...