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» Challenges in Physical Chip Design
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ISMAR
2002
IEEE
14 years 1 months ago
Augmented Chemistry: An Interactive Educational Workbench
This system paper reports on some of the advantages tangible interaction can bring to chemistry education. The paper describes the realisation of an in-house designed Tangible Use...
Morten Fjeld, Benedikt M. Voegtli
RSP
2005
IEEE
164views Control Systems» more  RSP 2005»
14 years 2 months ago
High Level Synthesis for Data-Driven Applications
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
Etienne Bergeron, Xavier Saint-Mleux, Marc Feeley,...
CODES
2009
IEEE
14 years 20 days ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
GECCO
2006
Springer
164views Optimization» more  GECCO 2006»
14 years 16 days ago
Biobjective evolutionary and heuristic algorithms for intersection of geometric graphs
Wire routing in a VLSI chip often requires minimization of wire-length as well as the number of intersections among multiple nets. Such an optimization problem is computationally ...
Rajeev Kumar, Pramod Kumar Singh, Bhargab B. Bhatt...
BMCBI
2005
121views more  BMCBI 2005»
13 years 8 months ago
Evaluation of gene importance in microarray data based upon probability of selection
Background: Microarray devices permit a genome-scale evaluation of gene function. This technology has catalyzed biomedical research and development in recent years. As many import...
Li M. Fu, Casey S. Fu-Liu