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ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 1 months ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...
EOR
2007
272views more  EOR 2007»
13 years 7 months ago
A dynamic logistics coordination model for evacuation and support in disaster response activities
This paper describes an integrated location-distribution model for coordinating logistics support and evacuation operations in disaster response activities. Logistics planning in ...
Wei Yi, Linet Özdamar
ICMCS
1997
IEEE
132views Multimedia» more  ICMCS 1997»
13 years 12 months ago
SMART UNIX SVR4 Support for Multimedia Applications
Multimedia applications have dynamic and adaptive realtime requirements. Current scheduling practice, as typified by UNIX System V Release 4, lacks the necessary information and ...
Jason Nieh, Monica S. Lam
CF
2008
ACM
13 years 9 months ago
Fpga-based prototype of a pram-on-chip processor
PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As...
Xingzhi Wen, Uzi Vishkin
DSD
2007
IEEE
122views Hardware» more  DSD 2007»
14 years 2 months ago
Energy Based Design Space Exploration of Multiprocessor VLIW Architectures
Today energy is an important factor in designing a multiprocessor system. The overall goal of this work is to propose a methodology for design space exploration of VLIW multiproce...
Manoj Gupta, Mayank Gupta, Neeraj Goel, M. Balaksr...