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CODES
2005
IEEE
14 years 3 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
CODES
2005
IEEE
14 years 3 months ago
Improving superword level parallelism support in modern compilers
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
Christian Tenllado, Luis Piñuel, Manuel Pri...
CODES
2005
IEEE
14 years 3 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
CODES
2005
IEEE
14 years 3 months ago
CRAMES: compressed RAM for embedded systems
Memory is a scarce resource in many embedded systems. Increasing memory often increases packaging and cooling costs, size, and energy consumption. This paper presents CRAMES, an e...
Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T...
HICSS
2005
IEEE
143views Biometrics» more  HICSS 2005»
14 years 3 months ago
Strategic Versus Tactical Design
Abstract. We seek to distinguish Strategic design decisions (e.g., to adopt a programming paradigm, architectural style, CBSE standard or application framework) from tactical desig...
Amnon H. Eden
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