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ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
13 years 11 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
DATE
2003
IEEE
109views Hardware» more  DATE 2003»
14 years 25 days ago
A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors
This paper presents a new algorithm for on-the-fly data compression in high performance VLIW processors. The algorithm aggressively targets energy minimization of some of the domi...
Alberto Macii, Enrico Macii, Fabrizio Crudo, Rober...
DAC
2003
ACM
14 years 8 months ago
A retargetable micro-architecture simulator
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...
Wai Sum Mong, Jianwen Zhu
ASPDAC
2008
ACM
69views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Fast, quasi-optimal, and pipelined instruction-set extensions
Nowadays many customised embedded processors offer the possibility of speeding up an application by implementing it using Application-Specific Functional units (AFUs). However, th...
Ajay K. Verma, Philip Brisk, Paolo Ienne
LCTRTS
2009
Springer
14 years 2 months ago
Addressing the challenges of DBT for the ARM architecture
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
Ryan W. Moore, José Baiocchi, Bruce R. Chil...