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LCTRTS
2004
Springer
14 years 27 days ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
IWSOC
2005
IEEE
151views Hardware» more  IWSOC 2005»
14 years 1 months ago
A Low Area and Low Power Programmable Baseband Processor Architecture
A fully programmable radio baseband processor architecture is presented. The architecture is based on a DSP processor core and a number flexible accelerators, connected via a con...
Eric Tell, Anders Nilsson, Dake Liu
HPCA
2005
IEEE
14 years 1 months ago
An Efficient Programmable 10 Gigabit Ethernet Network Interface Card
Paul Willmann, Hyong-youb Kim, Scott Rixner, Vijay...
ISCA
2003
IEEE
112views Hardware» more  ISCA 2003»
14 years 24 days ago
A Pipelined Memory Architecture for High Throughput Network Processors
Designing ASICs for each new generation of backbone routers is a time intensive and fiscally draining process. In this paper we focus on the design of a programmable architecture...
Timothy Sherwood, George Varghese, Brad Calder
ARCS
2008
Springer
13 years 9 months ago
A Generic Network Interface Architecture for a Networked Processor Array (NePA)
Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader ...