35 search results - page 3 / 7 » Characterizing the branch misprediction penalty |
HPCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Most of the prediction mechanisms predict a single path to continue the execution on a branch. Alternatively, we may exploit parallelism from either possible paths of a branch, di...
JILP
2000
13 years 7 months ago
2000
In today's wide-issue processors, even small branch-misprediction rates introduce substantial performance penalties. Worse yet, inadequate branch prediction creates a bottlen...
MICRO
1995
IEEE
13 years 11 months ago
1995
IEEE
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
IEEEPACT
2003
IEEE
14 years 20 days ago
2003
IEEE
In this paper, we study the effects of manipulating the architected direction of conditional branches. Through the use of statistical sampling, we find that about 40% of all dyna...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...