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MICRO
1991
IEEE
85views Hardware» more  MICRO 1991»
13 years 11 months ago
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, ...
ICCD
2002
IEEE
228views Hardware» more  ICCD 2002»
14 years 4 months ago
JMA: The Java-Multithreading Architecture for Embedded Processors
Embedded processors are increasingly deployed in applications requiring high performance with good real-time characteristics whilst being low power. Parallelism has to be extracte...
Panit Watcharawitch, Simon W. Moore
ISCA
1998
IEEE
128views Hardware» more  ISCA 1998»
13 years 12 months ago
Analytic Evaluation of Shared-memory Systems with ILP Processors
This paper develops and validates an analytical model for evaluating various types of architectural alternatives for shared-memory systems with processors that aggressively exploi...
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mar...
IPPS
2010
IEEE
13 years 5 months ago
pFANGS: Parallel high speed sequence mapping for Next Generation 454-roche Sequencing reads
Millions of DNA sequences (reads) are generated by Next Generation Sequencing machines everyday. There is a need for high performance algorithms to map these sequences to the refer...
Sanchit Misra, Ramanathan Narayanan, Wei-keng Liao...
ICDCS
1997
IEEE
13 years 12 months ago
Supporting Dynamic Space-sharing on Clusters of Non-dedicated Workstations
Clusters of workstations are increasingly being viewed as a cost-e ective alternative to parallel supercomputers. However, resource management and scheduling on workstations clust...
Abdur Chowdhury, Lisa D. Nicklas, Sanjeev Setia, E...