Abstract— Design of Network on chip architectures for multimedia applications is being widely studied. This involves design decisions at various levels of hierarchy. Topology des...
How can sequential applications benefit from the ubiquitous next generation of chip multiprocessors (CMP)? Part of the answer may be a dynamic execution environment that automatica...
Jisheng Zhao, Matthew Horsnell, Ian Rogers, Andrew...
In this paper, we present a BIST scheme for testing onchip AD and DA converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measurin...
The locomotor controller for walking, running, swimming, and flying animals is based on a Central Pattern Generator (CPG). Models of CPGs as systems of coupled non-linear oscillato...
M. Anthony Lewis, Ralph Etienne-Cummings, Avis H. ...
For the next generation of multi-core processors, the onchip interconnection networks must be efficient to achieve high data throughput and performance. Moreover, these interconne...
Henrique C. Freitas, Philippe Olivier Alexandre Na...