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PPOPP
2006
ACM
14 years 1 months ago
POSH: a TLS compiler that exploits program structure
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood, it is important to focus on TLS compilation. TLS compilers are interesting in that,...
Wei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin ...
ICCAD
2003
IEEE
135views Hardware» more  ICCAD 2003»
14 years 1 months ago
ATPG for Noise-Induced Switch Failures in Domino Logic
Domino circuits have been used in most modern high-performance microprocessor designs because of their high speed, low transistor-count and hazard-free operation. However, with te...
Rahul Kundu, R. D. (Shawn) Blanton
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
14 years 25 days ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
DAC
2009
ACM
14 years 18 days ago
GRIP: scalable 3D global routing using integer programming
We propose GRIP, a scalable global routing technique via Integer Programming (IP). GRIP optimizes wirelength and via cost without going through a layer assignment phase. GRIP sele...
Tai-Hsuan Wu, Azadeh Davoodi, Jeffrey T. Linderoth
ASPDAC
2008
ACM
150views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Constraint-free analog placement with topological symmetry structure
Abstract-- In analog circuits, blocks need to be placed symmetrically to satisfy the devices matching. Different from the existing constraint-driven approaches, the proposed topolo...
Qing Dong, Shigetoshi Nakatake