509 search results - page 56 / 102 » Chip Multi-Processor Generator |
DSD
2010
IEEE
13 years 6 months ago
2010
IEEE
— In this paper we propose a new method of test patterns compression based on a design of a dedicated SAT-based ATPG (Automatic Test Pattern Generator). This compression method i...
ICCAD
2000
IEEE
14 years 10 days ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
TVLSI
2008
13 years 7 months ago
2008
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
BMCBI
2006
13 years 8 months ago
2006
Background: Intensity values measured by Affymetrix microarrays have to be both normalized, to be able to compare different microarrays by removing non-biological variation, and s...
ASPDAC
2012
ACM
12 years 3 months ago
2012
ACM
— The Dark Silicon Age kicked off with the transition to multicore and will be characterized by a wild chase for seemingly ever-more insane architectural designs. At the heart o...