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MTV
2003
IEEE
109views Hardware» more  MTV 2003»
14 years 1 months ago
A Methodology for Validation of Microprocessors using Equivalence Checking
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...
Prabhat Mishra, Nikil D. Dutt
DSD
2004
IEEE
129views Hardware» more  DSD 2004»
13 years 11 months ago
Functional Validation of Programmable Architectures
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current Systemon-Chip design metho...
Prabhat Mishra, Nikil D. Dutt
TVLSI
2008
119views more  TVLSI 2008»
13 years 7 months ago
Automatic Design of Reconfigurable Domain-Specific Flexible Cores
Reconfigurable hardware is ideal for use in Systems-on-a-Chip, as it provides both hardware-level performance and post-fabrication flexibility. However, any one architecture is ra...
Katherine Compton, Scott Hauck
TVLSI
1998
81views more  TVLSI 1998»
13 years 7 months ago
Maximum power estimation for CMOS circuits using deterministic and statistical approaches
— Excessive instantaneous power consumption may reduce the reliability and performance of VLSI chips. Hence, to synthesize circuits with high reliability, it is imperative to efï...
Chuan-Yu Wang, Kaushik Roy
BIBE
2007
IEEE
191views Bioinformatics» more  BIBE 2007»
14 years 2 months ago
PANP - a New Method of Gene Detection on Oligonucleotide Expression Arrays
Abstract. Currently, the method most used for gene detection calls on Affymetrix oligonucleotide arrays is provided as part of the MAS5.0 software. The MAS method uses Wilcoxon sta...
Peter Warren, Deanne Taylor, Paolo G. V. Martini, ...