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VLSID
2008
IEEE
117views VLSI» more  VLSID 2008»
14 years 8 months ago
Single Event Upset: An Embedded Tutorial
Abstract-- With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends su...
Fan Wang, Vishwani D. Agrawal
ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
14 years 4 months ago
Design and optimization of a digital microfluidic biochip for protein crystallization
Proteins crystallization is a commonly used technique for protein analysis and subsequent drug design. It predicts the three-dimensional arrangement of the constituent amino acids...
Tao Xu, Krishnendu Chakrabarty, Vamsee K. Pamula
ICCAD
2007
IEEE
122views Hardware» more  ICCAD 2007»
14 years 4 months ago
Engineering change using spare cells with constant insertion
—In the VLSI design process, a design implementation often needs to be corrected because of new specifications or design constraint violations. This correction process is referre...
Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgo...
RECONFIG
2009
IEEE
182views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Scalability Studies of the BLASTn Scan and Ungapped Extension Functions
BLASTn is a ubiquitous tool used for large scale DNA analysis. Detailed profiling tests reveal that the most computationally intensive sections of the BLASTn algorithm are the sc...
Siddhartha Datta, Ron Sass
CASES
2009
ACM
14 years 2 months ago
Optimal loop parallelization for maximizing iteration-level parallelism
This paper solves the open problem of extracting the maximal number of iterations from a loop that can be executed in parallel on chip multiprocessors. Our algorithm solves it opt...
Duo Liu, Zili Shao, Meng Wang, Minyi Guo, Jingling...