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DAC
1998
ACM
13 years 12 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha
FSTTCS
2010
Springer
13 years 5 months ago
On extracting computations from propositional proofs (a survey)
This paper describes a project that aims at showing that propositional proofs of certain tautologies in weak proof system give upper bounds on the computational complexity of func...
Pavel Pudlák
FOSSACS
2007
Springer
13 years 11 months ago
The Complexity of Generalized Satisfiability for Linear Temporal Logic
In a seminal paper from 1985, Sistla and Clarke showed that satisfiability for Linear Temporal Logic (LTL) is either NP-complete or PSPACE-complete, depending on the set of tempora...
Michael Bauland, Thomas Schneider 0002, Henning Sc...
MEMOCODE
2007
IEEE
14 years 2 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
ICCAD
1995
IEEE
127views Hardware» more  ICCAD 1995»
13 years 11 months ago
Hybrid decision diagrams
Abstract: Functions that map boolean vectors into the integers are important for the design and veri cation of arithmetic circuits. MTBDDs and BMDs have been proposed for represent...
Edmund M. Clarke, Masahiro Fujita, Xudong Zhao