253 search results - page 43 / 51 » Circuit partitions and |
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the c...
SAMOS
2004
Springer
14 years 1 months ago
2004
Springer
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
ICNP
2003
IEEE
14 years 1 months ago
2003
IEEE
CAMs are the most popular practical method for implementing packet classification in high performance routers. Their principal drawbacks are high power consumption and inefficient...
VTS
2003
IEEE
14 years 1 months ago
2003
IEEE
—We present a dictionary-based test data compression approach for reducing test data volume and testing time in SOCs. The proposed method is based on the use of a small number of...