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ISSS
1999
IEEE
131views Hardware» more  ISSS 1999»
15 years 8 months ago
Compressed Code Execution on DSP Architectures
Decreasing the program size has become an important goal in the design of embedded systems target to mass production. This problem has led to a number of efforts aimed at designin...
Paulo Centoducatte, Ricardo Pannain, Guido Araujo
VISUALIZATION
1999
IEEE
15 years 8 months ago
A Multi-Threaded Streaming Pipeline Architecture for Large Structured Data Sets
Computer simulation and digital measuring systems are now generating data of unprecedented size. The size of data is becoming so large that conventional visualization tools are in...
C. Charles Law, Ken Martin, William J. Schroeder, ...
EUROMICRO
1996
IEEE
15 years 8 months ago
Behaviour-Preserving Transformations in SHE: A Formal Approach to Architecture Design
SHE (Software/Hardware Engineering) is an objectoriented analysis, specification and design method for complex reactive hardware/software systems. SHE is based on the formal speci...
Jeroen Voeten, P. H. A. van der Putten, M. P. J. S...
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
15 years 8 months ago
Transactional Memory: Architectural Support for Lock-Free Data Structures
A shared data structure is lock-free if its operations do not require mutual exclusion. If one process is interrupted in the middle of an operation, other processes will not be pr...
Maurice Herlihy, J. Eliot B. Moss
ISCA
1993
IEEE
137views Hardware» more  ISCA 1993»
15 years 8 months ago
Architectural Support for Translation Table Management in Large Address Space Machines
Virtual memoy page translation tables provide mappings from virtual to physical addresses. When the hardware controlled Tratmlation L.ookaside Buffers (TLBs) do not contain a tran...
Jerome C. Huck, Jim Hays