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IPPS
1998
IEEE
15 years 8 months ago
HIPIQS: A High-Performance Switch Architecture Using Input Queuing
Switch-based interconnects are used in a number of application domains including parallel system interconnects, local area networks, and wide area networks. However, very few swit...
Rajeev Sivaram, Craig B. Stunkel, Dhabaleswar K. P...
GLOBECOM
2009
IEEE
15 years 8 months ago
Energy-Efficient Multi-Pipeline Architecture for Terabit Packet Classification
Energy efficiency has become a critical concern in designing high speed packet classification engines for next generation routers. Although TCAM-based solutions can provide high th...
Weirong Jiang, Viktor K. Prasanna
131
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ISCA
2006
IEEE
130views Hardware» more  ISCA 2006»
15 years 4 months ago
Area-Performance Trade-offs in Tiled Dataflow Architectures
: Tiled architectures, such as RAW, SmartMemories, TRIPS, and WaveScalar, promise to address several issues facing conventional processors, including complexity, wire-delay, and pe...
Steven Swanson, Andrew Putnam, Martha Mercaldi, Ke...
OSN
2008
109views more  OSN 2008»
15 years 4 months ago
A non-competing hybrid optical burst switch architecture for QoS differentiation
In this paper, we present a new hybrid optical burst switch architecture (HOBS) that takes advantage of the pre-transmission idle time during lightpath establishment. In dynamic c...
Kyriakos Vlachos, Kostas Ramantas
TCOM
2008
92views more  TCOM 2008»
15 years 4 months ago
Mailbox switch: a scalable two-stage switch architecture for conflict resolution of ordered packets
Abstract-- Traditionally, conflict resolution in an inputbuffered switch is solved by finding a matching between inputs and outputs per time slot. To do this, a switch not only nee...
Cheng-Shang Chang, Duan-Shin Lee, Ying-Ju Shih, Ch...