3395 search results - page 91 / 679 » Circuit-aware architectural simulation |
137
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DATE
2005
IEEE
15 years 6 months ago
2005
IEEE
Transaction Level Modeling (TLM) approach is used to meet the simulation speed as well as cycle accuracy for large scale SoC performance analysis. We implemented a transaction-lev...
127
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FIW
1998
15 years 5 months ago
1998
The phases of the ANISE project (Architectural Notions In Service Engineering) are briefly explained with reference to the work reported here. An outline strategy is given for tra...
146
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AAAI
1994
15 years 5 months ago
1994
New approaches to solving constraint satisfaction problems using iterative improvement techniques have been found to be successful on certain, very large problems such as the mill...
167
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CSCW
2012
ACM
14 years 4 days ago
2012
ACM
Two important performance metrics in collaborative systems are local and remote response times. Previous analytical and simulation work has shown that these response times depend ...
146
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ISCA
1990
IEEE
15 years 8 months ago
1990
IEEE
An adaptive cache coherence mechanism exploits semantic information about the expected or observed access behavior of particular data objects. We contend that, in distributed shar...