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» Circuits, Pebbling and Expressibility
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DATE
1999
IEEE
101views Hardware» more  DATE 1999»
13 years 11 months ago
Polynomial Methods for Allocating Complex Components
Methods for performing component matching by expressing an arithmetic specification and a bit-level description of an implementation as word-level polynomials have been demonstrat...
James Smith, Giovanni De Micheli
CORR
2010
Springer
104views Education» more  CORR 2010»
13 years 7 months ago
Heuristic approach to optimize the number of test cases for simple circuits
In this paper a new solution is proposed for testing simple stwo stage electronic circuits. It minimizes the number of tests to be performed to determine the genuinity of the circ...
S. M. Thamarai, K. Kuppusamy, T. Meyyappan
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 17 days ago
Power consumption of logic circuits in ambipolar carbon nanotube technology
Ambipolar devices have been reported in many technologies, including carbon nanotube field effect transistors (CNTFETs). The ambipolarity can be in-field controlled with a secon...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
WCE
2007
13 years 8 months ago
Circuit Noise Interference on Sampling Clock and Its Effect on A/D Conversion
—Clock jitter and its effects on signal-to-noise ratio (SNR) were widely investigated in the published literatures. However, most of the issues mainly focused on white-Gaussian-n...
Sun Lei, An Jianping, Wu Yanbo
ICCD
2004
IEEE
100views Hardware» more  ICCD 2004»
14 years 4 months ago
Layout Driven Optimization of Datapath Circuits using Arithmetic Reasoning
This paper proposes a new formalism for layout-driven optimization of datapaths. It is based on preserving an arithmetic bit level representation of the arithmetic circuit portion...
Ingmar Neumann, Dominik Stoffel, Kolja Sulimma, Mi...