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» Clock Synchronization with Bounded Global and Local Skew
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DFT
2006
IEEE
122views VLSI» more  DFT 2006»
13 years 11 months ago
Efficient and Robust Delay-Insensitive QCA (Quantum-Dot Cellular Automata) Design
The concept of clocking for QCA, referred to as the four-phase clocking, is widely used. However, inherited characteristics of QCA, such as the way to hold state, the way to synch...
Minsu Choi, Myungsu Choi, Zachary D. Patitz, Nohpi...
SSS
2005
Springer
119views Control Systems» more  SSS 2005»
14 years 1 months ago
Self-stabilization of Byzantine Protocols
Awareness of the need for robustness in distributed systems increases as distributed systems become integral parts of day-to-day systems. Self-stabilizing while tolerating ongoing ...
Ariel Daliot, Danny Dolev
CL
2010
Springer
13 years 7 months ago
SystemJ: A GALS language for system level design
In this paper we present the syntax, semantics, and compilation of a new system-level programming language called SystemJ. SystemJ is a multiclock language supporting the Globally...
Avinash Malik, Zoran Salcic, Partha S. Roop, Alain...
ICCD
2007
IEEE
206views Hardware» more  ICCD 2007»
14 years 4 months ago
SCAFFI: An intrachip FPGA asynchronous interface based on hard macros
Building fully synchronous VLSI circuits is becoming less viable as circuit geometries evolve. However, before the adoption of purely asynchronous strategies in VLSI design, globa...
Julian J. H. Pontes, Rafael Soares, Ewerson Carval...
TVLSI
2010
13 years 2 months ago
A Low-Area Multi-Link Interconnect Architecture for GALS Chip Multiprocessors
A new inter-processor communication architecture for chip multiprocessors is proposed which has a low area cost, flexible routing capability, and supports globally asynchronous loc...
Zhiyi Yu, Bevan M. Baas