90 search results - page 4 / 18 » Clock distribution using multiple voltages |
LCTRTS
2007
Springer
14 years 3 months ago
2007
Springer
Embedded systems serve an emerging and diverse set of applications. As a result, more computational and storage capabilities are added to accommodate ever more demanding applicati...
ISLPED
2004
ACM
14 years 2 months ago
2004
ACM
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
GLVLSI
2000
IEEE
14 years 1 months ago
2000
IEEE
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...
ISLPED
2004
ACM
14 years 2 months ago
2004
ACM
The quadratic relationship between voltage and energy has made dynamic voltage scaling (DVS) one of the most powerful techniques to reduce system power demands. Recently, techniqu...