205 search results - page 30 / 41 » Clock gating architectures for FPGA power reduction |
HPCA
2001
IEEE
14 years 11 months ago
2001
IEEE
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
VLSID
2005
IEEE
14 years 11 months ago
2005
IEEE
Two Simple structures of low-power Dual-edge triggered Static Pulsed Flip-Flops (DSPFF) are presented in this paper. They are composed of a dualedge pulse generator and a static f...
DAC
2006
ACM
14 years 11 months ago
2006
ACM
FinFET devices promise to replace traditional MOSFETs because of superior ability in controlling leakage and minimizing short channel effects while delivering a strong drive curre...
ICRA
2007
IEEE
14 years 5 months ago
2007
IEEE
— For certain applications, field robotic systems require small size for cost, weight, access, stealth or other reasons. Small size results in constraints on critical resources s...
GLVLSI
2000
IEEE
14 years 3 months ago
2000
IEEE
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...