96 search results - page 10 / 20 » Clock-Aware Placement for FPGAs |
SLIP
2005
ACM
14 years 28 days ago
2005
ACM
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the probl...
FCCM
2002
IEEE
14 years 10 days ago
2002
IEEE
C-slow retiming (changing a design to support multiple instances of a computation) and datapath-aware placement have long been advocated by members of the FPGA synthesis community...
FPL
2004
Springer
14 years 23 days ago
2004
Springer
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...
VLSID
2005
IEEE
14 years 7 months ago
2005
IEEE
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...