62 search results - page 8 / 13 » Co-synthesis with custom ASICs |
FPL
2009
Springer
14 years 2 months ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
FPGA
2001
ACM
14 years 2 months ago
2001
ACM
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
ICES
1998
Springer
14 years 2 months ago
1998
Springer
This paper focuses on characteristics and applications of evolvable hardware (EHW) to space systems. The motivation for looking at EHW originates in the need for more autonomous ad...
FPL
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...
DATE
2008
IEEE
14 years 4 months ago
2008
IEEE
Stream processing applications such as image signal processing demand high throughput. However, customers increasingly demand runtime flexibility in their designs, which cannot b...