398 search results - page 36 / 80 » Code Cache Management Schemes for Dynamic Optimizers |
VTS
2007
IEEE
14 years 2 months ago
2007
IEEE
Conventional error correcting code (ECC) schemes used in memories and caches cannot correct double bit errors caused by a single event upset (SEU). As memory density increases, mu...
CASES
2010
ACM
13 years 6 months ago
2010
ACM
We present a fine-grain dynamic instruction placement algorithm for small L0 scratch-pad memories (spms), whose unit of transfer can be an individual instruction. Our algorithm ca...
MICRO
1991
IEEE
13 years 11 months ago
1991
IEEE
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
MCSS
2009
Springer
14 years 15 days ago
2009
Springer
- In this paper, we investigate a new approach for the spectrum allocation in UWB systems. This approach consists in a cross-layer scheme that takes into consideration the differen...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
— The Dynamic Voltage Scaling (DVS) technique is the basis of numerous state-of-the-art energy management schemes proposed for real-time embedded systems. However, recent researc...