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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
14 years 1 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
DATE
2008
IEEE
134views Hardware» more  DATE 2008»
14 years 1 months ago
Adaptive Filesystem Compression for Embedded Systems
Abstract—Embedded system secondary storage size is often constrained, yet storage demands are growing as a result of increasing application complexity and storage of personal dat...
Lan S. Bai, Haris Lekatsas, Robert P. Dick
APCCAS
2002
IEEE
156views Hardware» more  APCCAS 2002»
14 years 11 days ago
Bit-plane watermarking for zerotree-coded images
In this paper, we develop a robust bit-plane watermarking technique based on zerotree coding. A robust watermark is an imperceptible but indelible code that can be used for owners...
Shih-Hsuan Yang, Hsin-Chang Chen
ICCAD
2007
IEEE
109views Hardware» more  ICCAD 2007»
13 years 11 months ago
CacheCompress: a novel approach for test data compression with cache for IP embedded cores
Abstract-- In this paper, we propose a novel test data compression technique named CacheCompress, which combines selective encoding and dynamic dictionary based encoding. Depending...
Hao Fang, Chenguang Tong, Bo Yao, Xiaodi Song, Xu ...
ASYNC
1998
IEEE
122views Hardware» more  ASYNC 1998»
13 years 11 months ago
A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...
Martin Benes, Steven M. Nowick, Andrew Wolfe