Sciweavers

966 search results - page 119 / 194
» Code Generation for Embedded Processors
Sort
View
VLSISP
1998
114views more  VLSISP 1998»
13 years 8 months ago
A Region-Based Representation of Images in MARS
We study the problem of representing images within a multimedia Database Management System (DBMS), in order to support fast retrieval operations without compromising storage e cien...
Sergio D. Servetto, Yong Rui, Kannan Ramchandran, ...
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 2 months ago
Interface design approach for system on chip based on configuration
Communication synthesis is an essential step in hardware/software co-synthesis: many embedded systems use automatic generation of interface for point to point communication or use...
Issam Maalej, Guy Gogniat, Mohamed Abid, Jean Luc ...
ICMCS
2005
IEEE
104views Multimedia» more  ICMCS 2005»
14 years 2 months ago
A High-Performance Memory-Efficient Architecture of the Bit-Plane Coder in JPEG 2000
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
Grzegorz Pastuszak
VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
14 years 9 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
SCOPES
2004
Springer
14 years 2 months ago
Combined Data Partitioning and Loop Nest Splitting for Energy Consumption Minimization
For mobile embedded systems, the energy consumption is a limiting factor because of today’s battery capacities. Besides the processor, memory accesses consume a high amount of en...
Heiko Falk, Manish Verma