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» Code Generation for Embedded Processors
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ASYNC
1998
IEEE
122views Hardware» more  ASYNC 1998»
13 years 11 months ago
A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...
Martin Benes, Steven M. Nowick, Andrew Wolfe
DATE
2006
IEEE
133views Hardware» more  DATE 2006»
14 years 1 months ago
Automatic generation of operation tables for fast exploration of bypasses in embedded processors
Customizing the bypasses in an embedded processor uncovers valuable trade-offs between the power, performance and the cost of the processor. Meaningful exploration of bypasses re...
Sanghyun Park, Eugene Earlie, Aviral Shrivastava, ...
CASES
2006
ACM
14 years 1 months ago
Code transformation strategies for extensible embedded processors
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
Paolo Bonzini, Laura Pozzi
IPPS
1998
IEEE
13 years 11 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man
ASPDAC
2007
ACM
130views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Configurable Multi-Processor Platforms for Next Generation Embedded Systems
- Next-generation embedded systems in application domains such as multimedia, wired and wireless communications, and multipurpose portable devices, are increasingly turning to mult...
David Goodwin, Chris Rowen, Grant Martin