966 search results - page 20 / 194 » Code Generation for Embedded Processors |
CODES
2001
IEEE
13 years 11 months ago
2001
IEEE
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
CODES
1999
IEEE
13 years 12 months ago
1999
IEEE
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
HPCA
2001
IEEE
14 years 8 months ago
2001
IEEE
Clustered ILP processors are characterized by a large number of non-centralized on-chip resources grouped into clusters. Traditional code generation schemes for these processors c...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--Loop tiling is an important compiler transformation used for enhancing data locality and exploiting coarsegrained parallelism. Tiled codes in which tile sizes are runtime...
CODES
1999
IEEE
13 years 12 months ago
1999
IEEE
A well-known challenge during processor design is to obtain the best possible results for a typical target application domain that is generally described as a set of benchmarks. O...