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ICPP
1997
IEEE
14 years 1 months ago
A Register Allocation Technique Using Register Existence Graph
Optamzztng compalataon as very amportant for generatang code sequentes an order to utalaze the characterastacs of processor archatectures. One of the most essentaal optzmazataon t...
Akira Koseki, Yoshiaki Fukazawa, Hideaki Komatsu
DAM
2011
13 years 3 months ago
Weak sense of direction labelings and graph embeddings
An edge-labeling λ for a directed graph G has a weak sense of direction (WSD) if there is a function f that satisfies the condition that for any node u and for any two label seq...
Christine T. Cheng, Ichiro Suzuki
ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
14 years 1 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
SIGMOD
2011
ACM
290views Database» more  SIGMOD 2011»
12 years 11 months ago
Database state generation via dynamic symbolic execution for coverage criteria
Automatically generating sufficient database states is imperative to reduce human efforts in testing database applications. Complementing the traditional block or branch coverage...
Kai Pan, Xintao Wu, Tao Xie
ESTIMEDIA
2004
Springer
14 years 2 months ago
A hardware accelerator IP for EBCOT Tier-1 coding in JPEG2000 Standard
We proposed a hardware accelerator IP for the Tier-1 portion of Embedded Block Coding with Optimal Truncation (EBCOT) used in the JPEG2000 next generation image compression standa...
Tien-Wei Hsieh, Youn-Long Lin