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» Code Optimization Techniques for Embedded DSP Microprocessor...
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RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
14 years 2 days ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
ICMCS
2005
IEEE
208views Multimedia» more  ICMCS 2005»
14 years 1 months ago
Error Resilient Coding Based on Reversible Data Embedding Technique for H.264/AVC Video
In this paper, a prescription-based error concealment (PEC) method is proposed. PEC relies on pre-analyses of the concealment error image (CEI) for I-frames and the optimal error ...
Wen-Nung Lie, Tom C.-I. Lin, Dung-Chan Tsai, Guo-S...
MICRO
2002
IEEE
173views Hardware» more  MICRO 2002»
14 years 18 days ago
Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
Christoforos E. Kozyrakis, David A. Patterson
ASAP
1997
IEEE
92views Hardware» more  ASAP 1997»
13 years 11 months ago
Optimized software synthesis for synchronous dataflow
This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable ...
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward...
PLDI
1994
ACM
13 years 11 months ago
Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
Jack W. Davidson, Sanjay Jinturkar