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ISHPC
1999
Springer
13 years 12 months ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
ASPDAC
2006
ACM
176views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Conversion of reference C code to dataflow model: H.264 encoder case study
– Model-based design is widely accepted in developing complex embedded system under intense time-to-market pressure. While it promises improved design productivity, the main bott...
Hyeyoung Hwang, Taewook Oh, Hyunuk Jung, Soonhoi H...
NOCS
2009
IEEE
14 years 2 months ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
ASPDAC
2001
ACM
137views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Optimized address assignment for DSPs with SIMD memory accesses
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
Markus Lorenz, David Koffmann, Steven Bashford, Ra...
INFOCOM
1999
IEEE
14 years 1 hour ago
Techniques for Optimizing CORBA Middleware for Distributed Embedded Systems
The distributed embedded systems industry is poised to leverage emerging real-time operating systems, such as Inferno, Windows CE 2.0, and Palm OS, to support mobile communication...
Aniruddha S. Gokhale, Douglas C. Schmidt