Sciweavers

272 search results - page 20 / 55
» Code Transformations to Improve Memory Parallelism
Sort
View
ICPP
1993
IEEE
14 years 22 days ago
Automatic Parallelization Techniques for the EM-4
: This paper presents a Data-Distributed Execution approach that exploits interation-level parallelism in loops operating over arrays. It performs data-dependency analysis, based o...
Lubomir Bic, Mayez A. Al-Mouhamed
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
14 years 2 months ago
Non-fractional parallelism in LDPC decoder implementations
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
John Dielissen, Andries Hekstra
POPL
1998
ACM
14 years 25 days ago
Maximal Static Expansion
Memory expansions are classical means to extract parallelism from imperative programs. However, for dynamic control programs with general memory accesses, such transformations eit...
Denis Barthou, Albert Cohen, Jean-Francois Collard
PDPTA
2000
13 years 10 months ago
Evaluation of Neural and Genetic Algorithms for Synthesizing Parallel Storage Schemes
Exploiting compile time knowledge to improve memory bandwidth can produce noticeable improvements at run-time [13, 1]. Allocating the data structure [13] to separate memories when...
Mayez A. Al-Mouhamed, Husam Abu-Haimed
IPPS
1998
IEEE
14 years 26 days ago
Compiler-Optimization of Implicit Reductions for Distributed Memory Multiprocessors
This paper presents reduction recognition and parallel code generationstrategies for distributed-memorymultiprocessors. We describe techniques to recognize a broad range of implic...
Bo Lu, John M. Mellor-Crummey