272 search results - page 40 / 55 » Code Transformations to Improve Memory Parallelism |
IPPS
2000
IEEE
14 years 1 months ago
2000
IEEE
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
ICS
1999
Tsinghua U.
14 years 28 days ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
LCTRTS
2009
Springer
14 years 3 months ago
2009
Springer
Most programming languages support a call stack in the programming model and also in the runtime system. We show that for applications targeting low-power embedded microcontroller...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
ASAP
2003
IEEE
14 years 1 months ago
2003
IEEE
At the Leiden Embedded Research Center, we are developing a compiler called Compaan that automatically translates signal processing applications written in Matlab into Kahn Proces...