151 search results - page 6 / 31 » Code transformation strategies for extensible embedded proce... |
IPPS
2007
IEEE
14 years 27 days ago
2007
IEEE
With the increasing gap between processor speed and memory latency, the performance of data-dominated programs are becoming more reliant on fast data access, which can be improved...
ICPADS
2006
IEEE
14 years 19 days ago
2006
IEEE
One of the major factors that can potentially slow down widespread use of embedded chip multiprocessors is lack of efficient software support. In particular, automated code paral...
ICCAD
2001
IEEE
14 years 3 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper we propose an embedded software design flow, which starts from an UML model and provides automatic mapping to other models like Simulink or finite-state machines (FS...
CC
2003
Springer
13 years 12 months ago
2003
Springer
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...