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115
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MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
15 years 2 months ago
Protocol Wrappers for Layered Network Packet Processing in Reconfigurable Hardware
abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform ...
Florian Braun, John W. Lockwood, Marcel Waldvogel
VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
15 years 7 months ago
Interfacing Cores with On-chip Packet-Switched Networks
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...
Praveen Bhojwani, Rabi N. Mahapatra
CN
2004
102views more  CN 2004»
15 years 2 months ago
A mathematical model of the Paris Metro Pricing scheme for charging packet networks
Pricing has become one of the main challenges of the networking community and is receiving a great deal of interest in the literature. In this paper, we analyze the so-called Pari...
David Ros, Bruno Tuffin
154
Voted
WIOPT
2010
IEEE
15 years 27 days ago
Optimal slotted random access in coded wireless packet networks
Abstract—We consider the problem of jointly optimizing random access and subgraph selection in coded wireless packet networks. As opposed to the corresponding scheduling approach...
Maximilian Riemensberger, Michael Heindlmaier, And...
118
Voted
TCSV
2002
132views more  TCSV 2002»
15 years 2 months ago
A study of real-time packet video quality using random neural networks
An important and unsolved problem today is the automatic quantification of the quality of video flows transmitted over packet networks. In particular, the ability to perform this ...
Samir Mohamed, Gerardo Rubino