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FCCM
2005
IEEE
139views VLSI» more  FCCM 2005»
14 years 1 months ago
A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation
Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures. We previously in...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
FPL
2005
Springer
114views Hardware» more  FPL 2005»
14 years 1 months ago
Measuring and Utilizing the Correlation Between Signal Connectivity and Signal Positioning for FPGAs Containing Multi-Bit Buildi
As the logic capacity of FPGA increases, there has been a corresponding increase in the variety of FPGA building blocks. From a mere collection of the conventional logic blocks, F...
Andy Gean Ye, Jonathan Rose
DAGSTUHL
2006
13 years 9 months ago
Pre-Routed FPGA Cores for Rapid System Construction in a Dynamic Reconfigurable System
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...
Douglas L. Maskell, Timothy F. Oliver
ISVLSI
2007
IEEE
116views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
Soumya Eachempati, Narayanan Vijaykrishnan, Arthur...
TVLSI
2008
106views more  TVLSI 2008»
13 years 7 months ago
New Non-Volatile Memory Structures for FPGA Architectures
A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is describ...
David Choi, Kyu Choi, John D. Villasenor