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» Collaborative Routing Architecture for FPGA
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FPL
2005
Springer
96views Hardware» more  FPL 2005»
14 years 1 months ago
Dynamic Reconfiguration with hardwired Networks-on-Chip on future FPGAs
Due to their layered approach, Networks-on-Chip (NoC) are a promising communication backbone in the field of heterogeneous dynamically reconfigurable systems. In this paper a fu...
Ronald Hecht, Stephan Kubisch, Andreas Herrholtz, ...
ICCBR
2001
Springer
13 years 12 months ago
Collaborative Case-Based Reasoning: Applications in Personalised Route Planning
Abstract. Distributed case-based reasoning architectures have the potential to improve the overall performance of case-based reasoning systems. In this paper we describe a collabor...
Lorraine McGinty, Barry Smyth
FPL
2005
Springer
112views Hardware» more  FPL 2005»
14 years 1 months ago
Defect-Tolerant FPGA Switch Block and Connection Block with Fine-Grain Redundancy for Yield Enhancement
Future process nodes have such small feature sizes that there will be an increase in the number of manufacturing defects per die. For large FPGAs, it will be critical to tolerate ...
Anthony J. Yu, Guy G. Lemieux
FPGA
2007
ACM
106views FPGA» more  FPGA 2007»
14 years 1 months ago
A synthesizable datapath-oriented embedded FPGA fabric
We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
DAC
2005
ACM
14 years 8 months ago
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...
Kenneth Eguro, Scott Hauck, Akshay Sharma