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» Collaborative architecture design and evaluation
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158
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HPCA
1998
IEEE
15 years 8 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
112
Voted
DAC
1997
ACM
15 years 7 months ago
Frequency-Domain Compatibility in Digital Filter BIST
We examine frequency-domain issues in the design and selection of on-chip test generators for built-in self-test (BIST) of highperformance digital filters. Test-generator/circuit...
Laurence Goodby, Alex Orailoglu
114
Voted
FPGA
1997
ACM
145views FPGA» more  FPGA 1997»
15 years 7 months ago
Generation of Synthetic Sequential Benchmark Circuits
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct problem for FPGA vendors: how to test and evaluate the ...
Michael D. Hutton, Jonathan Rose, Derek G. Corneil
148
Voted
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 7 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
INFOCOM
1992
IEEE
15 years 7 months ago
An Assessment of State and Lookup Overhead in Routers
The current Internet is based on a stateless (datagram) architecture. However, many recent proposals rely on the maintenance of state information within network routers, leading t...
Deborah Estrin, Danny J. Mitzel