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ICCAD
2007
IEEE
157views Hardware» more  ICCAD 2007»
14 years 4 months ago
Performance and power evaluation of a 3D CMOS/nanomaterial reconfigurable architecture
—In this paper, we introduce a novel reconfigurable architecture, named 3D nFPGA, which utilizes 3D integration techniques and new nanoscale materials synergistically. The propos...
Chen Dong, Deming Chen, Sansiri Tanachutiwat, Wei ...
HPCA
2001
IEEE
14 years 8 months ago
An Architectural Evaluation of Java TPC-W
The use of the Java programming language for implementing server-side application logic is increasing in popularity, yet there is very little known about the architectural require...
Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko ...
DAC
1997
ACM
13 years 11 months ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
IPPS
2003
IEEE
14 years 27 days ago
Performance Monitoring and Evaluation of a UPC Implementation on a NUMA Architecture
UPC is an explicit parallel extension of ANSI C, which has been gaining rising attention from vendors and users. In this work, we consider the low-level monitoring and experimenta...
François Cantonnet, Yiyi Yao, Smita Annared...
HPCA
2003
IEEE
14 years 8 months ago
Evaluating the Impact of Communication Architecture on the Performability of Cluster-Based Services
We consider the impact of different communication architectures on the performability (performance + availability) of cluster-based servers. In particular, we use a combination of ...
Kiran Nagaraja, Neeraj Krishnan, Ricardo Bianchini...