Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
Abstract—We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
Abstract--This paper presents a new wavelet-based image denoising method, which extends a recently emerged "geometrical" Bayesian framework. The new method combines three...
Aleksandra Pizurica, Wilfried Philips, Ignace Lema...
Abstract— This paper describes a hierarchical planner deployed on a mobile manipulation system. The main idea is a two-level hierarchy combining a global planner which provides r...
Ross A. Knepper, Siddhartha S. Srinivasa, Matthew ...