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TCAD
1998
126views more  TCAD 1998»
13 years 9 months ago
Iterative remapping for logic circuits
Abstract—This paper presents an aggressive optimization technique targeting combinational logic circuits. Starting from an initial implementation mapped on a given technology lib...
Luca Benini, Patrick Vuillod, Giovanni De Micheli
TCAD
1998
125views more  TCAD 1998»
13 years 9 months ago
BDD-based synthesis of extended burst-mode controllers
Abstract—We examine the implications of a new hazard-free combinational logic synthesis method [1], which generates multiplexor-based networks from binary decision diagrams (BDDs...
Kenneth Y. Yun, Bill Lin, David L. Dill, Srinivas ...
TCAD
2002
91views more  TCAD 2002»
13 years 9 months ago
Retiming and clock scheduling for digital circuit optimization
Abstract--This paper investigates the application of simultaneous retiming and clock scheduling for optimizing synchronous circuits under setup and hold constraints. Two optimizati...
Xun Liu, Marios C. Papaefthymiou, Eby G. Friedman
TIP
2002
133views more  TIP 2002»
13 years 9 months ago
A joint inter- and intrascale statistical model for Bayesian wavelet based image denoising
Abstract--This paper presents a new wavelet-based image denoising method, which extends a recently emerged "geometrical" Bayesian framework. The new method combines three...
Aleksandra Pizurica, Wilfried Philips, Ignace Lema...
ICRA
2010
IEEE
140views Robotics» more  ICRA 2010»
13 years 8 months ago
Hierarchical planning architectures for mobile manipulation tasks in indoor environments
Abstract— This paper describes a hierarchical planner deployed on a mobile manipulation system. The main idea is a two-level hierarchy combining a global planner which provides r...
Ross A. Knepper, Siddhartha S. Srinivasa, Matthew ...