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ISMVL
1998
IEEE
113views Hardware» more  ISMVL 1998»
15 years 8 months ago
Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic
The use of Look-Up Tables (LUTs) is extended from binary to multiple-valued logic (MVL) circuits. A multiplevalued LUT can be implemented using both current-mode and voltage-mode ...
Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak
DAC
1996
ACM
15 years 8 months ago
Test Point Insertion: Scan Paths through Combinational Logic
We propose a low-overhead scan design methodology which employs a new test point insertion technique to establish scan paths through the functional logic. The technique re-uses th...
Chih-Chang Lin, Malgorzata Marek-Sadowska, Kwang-T...
BMCBI
2011
14 years 11 months ago
A discriminative method for family-based protein remote homology detection that combines inductive logic programming and proposi
Background: Remote homology detection is a hard computational problem. Most approaches have trained computational models by using either full protein sequences or multiple sequenc...
Juliana S. Bernardes, Alessandra Carbone, Gerson Z...
ESANN
2008
15 years 5 months ago
An automatic identifier of Confinement Regimes at JET combining Fuzzy Logic and Classification Trees
In modern thermonuclear fusion devices it is possible to distinguish distinct types of plasma confinement regimes which have different performance in terms of confinement time. Dis...
Guido Vagliasindi, Paolo Arena, Luigi Fortuna, And...
CVPR
2007
IEEE
16 years 6 months ago
Combining Static Classifiers and Class Syntax Models for Logical Entity Recognition in Scanned Historical Documents
Class syntax can be used to 1) model temporal or locational evolvement of class labels of feature observation sequences, 2) correct classification errors of static classifiers if ...
Song Mao, Praveer Mansukhani, George R. Thoma