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MEMOCODE
2010
IEEE
15 years 2 months ago
FPGA-based combined architecture for stream categorization and intrusion detection
This paper presents a working solution for the MEMOCODE 2010 design contest. The design presented in this paper is implemented in the Xilinx V5LX330 FPGA as a custom circuit. The s...
Sunil Shukla, Rodric Rabbah, Martin Vorbach
RECONFIG
2009
IEEE
172views VLSI» more  RECONFIG 2009»
15 years 11 months ago
Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow
Abstract—The main challenge when implementing cryptographic algorithms in hardware is to protect them against attacks that target directly the device. Two strategies are customar...
Shivam Bhasin, Jean-Luc Danger, Florent Flament, T...

Publication
253views
15 years 2 months ago
Multisensory Oddity Detection as Bayesian Inference
A key goal for the perceptual system is to optimally combine information from all the senses that may be available in order to develop the most accurate and unified picture possi...
Timothy Hospedales and Sethu Vijayakumar
FSS
2008
145views more  FSS 2008»
15 years 4 months ago
A logic programming framework for possibilistic argumentation: Formalization and logical properties
In the last decade defeasible argumentation frameworks have evolved to become a sound setting to formalize commonsense, qualitative reasoning. The logic programming paradigm has s...
Teresa Alsinet, Carlos Iván Chesñeva...
EUROGP
2000
Springer
116views Optimization» more  EUROGP 2000»
15 years 8 months ago
An Extrinsic Function-Level Evolvable Hardware Approach
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
Tatiana Kalganova