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ASAP
2005
IEEE
96views Hardware» more  ASAP 2005»
15 years 10 months ago
On-Chip Lookup Tables for Fast Symmetric-Key Encryption
On public communication networks such as the Internet, data confidentiality can be provided by symmetric-key ciphers. One of the most common operations used in symmetric-key ciphe...
A. Murat Fiskiran, Ruby B. Lee
ASYNC
2005
IEEE
118views Hardware» more  ASYNC 2005»
15 years 10 months ago
Modeling and Verifying Circuits Using Generalized Relative Timing
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
ATS
2005
IEEE
118views Hardware» more  ATS 2005»
15 years 10 months ago
Partial Gating Optimization for Power Reduction During Test Application
Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ra...
CSFW
2005
IEEE
15 years 10 months ago
Nomad: A Security Model with Non Atomic Actions and Deadlines
Modelling security policies requires means to specify permissions and prohibitions. However, this is generally not sufficient to express security properties such as availability ...
Frédéric Cuppens, Nora Cuppens-Boula...
DATE
2005
IEEE
127views Hardware» more  DATE 2005»
15 years 10 months ago
A Novel Low-overhead Delay Testing Technique for Arbitrary Two-Pattern Test Application
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Rayc...