297 search results - page 52 / 60 » Combining network reductions and simulation to estimate netw... |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes a library-free technology mapping algorithm to reduce delay in combinational circuits. The algorithm reduces the overall number of series transistors through t...
TVLSI
2010
13 years 2 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
MOBICOM
2010
ACM
13 years 7 months ago
2010
ACM
We report a first-of-its-kind realization of directional transmission for smartphone-like mobile devices using multiple passive directional antennas, supported by only one RF chai...
BMCBI
2007
13 years 7 months ago
2007
Background: DNA microarray experiments are conducted in logical sets, such as time course profiling after a treatment is applied to the samples, or comparisons of the samples unde...