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ASPLOS
1996
ACM
14 years 1 months ago
1996
ACM
This paper describes the synchronization and communication primitives of the Cray T3E multiprocessor, a shared memory system scalable to 2048 processors. We discuss what we have l...
DSD
2006
IEEE
14 years 1 months ago
2006
IEEE
We present a performance-oriented refinement approach that refines a perfectly synchronous communication model onto Network-on-Chip (NoC) communication. We first identify four bas...
TVLSI
2011
13 years 4 months ago
2011
—Communication costs, which have the potential to throttle design performance as scaling continues, are mathematically modeled and compared for various pipeline methodologies. Fi...
CF
2010
ACM
14 years 2 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
VLSID
2008
IEEE
14 years 10 months ago
2008
IEEE
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...