Abstract—We consider two natural extensions of the communication complexity model that are inspired by distributed computing. In both models, two parties are equipped with synchr...
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
— As Internet computing gains speed, complexity and becomes ubiquitous, the need for precise and accurate time synchronization increases. In this paper, we present a characteriza...
Cristina D. Murta, Pedro R. Torres Jr., Prasant Mo...
d Abstract] Christoph Lenzen Computer Engineering and Networks Laboratory (TIK) ETH Zurich, 8092 Zurich, Switzerland lenzen@tik.ee.ethz.ch Thomas Locher Computer Engineering and N...
Christoph Lenzen, Thomas Locher, Roger Wattenhofer
Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...