362 search results - page 15 / 73 » Communication Mechanisms for Parallel DSP Systems on a Chip |
IPPS
2000
IEEE
14 years 7 days ago
2000
IEEE
Buffered coscheduling is a scheduling methodology for time-sharing communicating processes in parallel and distributed systems. The methodology has two primary features: communica...
DATE
2000
IEEE
14 years 8 days ago
2000
IEEE
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...
AAMAS
2002
Springer
13 years 7 months ago
2002
Springer
The paper surveys some of the mechanisms that have been demonstrated to be relevant for evolving communication systems in software simulations or robotic experiments. In each case,...
ICS
2011
Tsinghua U.
12 years 11 months ago
2011
Tsinghua U.
Efficient on-chip resource management is crucial for Chip Multiprocessors (CMP) to achieve high resource utilization and enforce system-level performance objectives. Existing mul...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...